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stv5348 stv5348/h - stv5348/t monochip teletext and vps decoder with 8 integrated pages september 1998 . complete teletext and vps decoder including an 8 page memory on a sin- gle chip . upward software compatible with previous sgs-thomsons multichip solutions (saa5231, sda5243, stv5345) . perform pdc system a (vps) and pdc system b (8/30/2) data storage sepa- ratly . dedicated "error free" output for valid pdc data . indication of line 23 for external use . single +5v supply voltage . single 13.875mhz crystal . reduced set of external compo- nents, no external adjustment . optimized number of digital signals reducing emc radiation . high density cmos technology . digital data slicer and display clock phase lock loop . 28 pin dip & so package description the stv5348 decoder is a computer-controlled teletext device including an 8 page internal mem- ory. data slicing and capturing extracts the teletext information embedded in the composite video sig- nal. control is accomplished via a two wire serial i 2 c bus a . chip address is 22h. internal rom pro- vides a character set suitable to display text using up to seven national languages. hardware and software features allow selectable master/slave synchronization configurations. the stv5348 also supports facilities for reception and display of cur- rent level protocol data. dip28 (plastic package) order code : stv5348 west european stv5348/h east european stv5348/t turkish & european 1 2 3 4 5 6 28 27 26 25 24 23 7 8 9 22 21 20 10 19 11 18 12 17 13 16 14 15 odd/even cor blan rgb ref r b g v ssd ffb sttv/lfb pol v dda cvbs ma/sl cblk test v ssa v sso xti xto v ddd vcr/tv reserved dv l23 sda scl y 5348-01.eps pin connections so28 (plastic package) order code : stv5348d west european stv5348d/h east european stv5348d/t turkish & european 1/22
pin description pin n o symbol function description figure 1 cvbs input composite video signal input through coupling capacitor 9 2 ma/sl input master/slave selection mode 11 3v dda analog supply +5v - 4 pol input sttv / lfb / ffb polarity selection 12 5 sttv/lfb output / input composite sync output, line flyback input 15 6 ffb input field flyback input 12 7v ssd ground digital ground - 8 r output video red signal 13 9 g output video green signal 13 10 b output video blue signal 13 11 rgbref supply dc voltage to define rgb high level 13 12 blan output fast blanking output ttl level 15 13 cor output open drain contrast reduction output 15 14 odd/even output 25hz output field synchronized for non-interlaced display 15 15 y output open drain foreground information output 15 16 scl input serial clock input 16 17 sda input/ output serial data input/output 17 18 l23 output line 23 identification 15 19 dv output vps data valid 15 20 reserved test to be connected to v ssd through a resistor 15 21 vcr/tv input pll time constant selection 15 22 v ddd digital supply +5v - 23 xto crystal output oscillator output 13.875mhz 14 24 xti crystal input oscillator input 13.875mhz 14 25 v sso ground oscillator ground - 26 v ssa ground analog ground - 27 test test grounded to v ssa 11 28 cblk input / output to connect black level storage capacitor 28 5348-01.tbl l23 18 ctrl data address ctrl data address data clock blan red green blue y scl sda xti xto cvbs test rgb ref pol ffb sttv/lfb display interface 8 pages memory data decoding data processing clamping synchronizing data extraction 27 1 28 21 24 23 25 16 17 7 26 14 11 15 10 9 8 13 12 3 22 5 6 2 4 i c bus interface 2 stv5348 cblk vcr/tv v sso v ssd v ssa odd/even cor v dda v ddd ma/sl oscillator frequency synthetizer time base 19 dv 20 test 5348-02.eps block diagram stv5348 - stv5348/h - stv5348/t 2/22
absolute maximum ratings symbol parameter value unit v dd positive supply voltage on v ddd and v dda - 0.3, 6.0 v v i input voltage (any input) - 0.3, v dd + 0.5 v v o output voltage (any output) - 0.3, v dd + 0.5 v d v dd difference between v ddd , v dda 0.25 v t oper operating ambient temperature 0, + 70 o c t stg storage temperature - 40, + 150 o c 5348-02.tbl electrical characteristics (v dd = 5v, v ss = 0v, t a = 25 o c) symbol parameter min. typ. max. unit supplies v dd supply voltage 4.75 5 5.25 v i ddd v ddd pin supply current 30 ma i dda v dda pin supply current 5 ma inputs cblk i blko source current (v cblk = 2v, v cvbs = 0v) 80 m a i blki sink current (v cblk = 2v, v cvbs = 1v)) - 10 m a cvbs cvbsi video input amplitude (peak to peak) 1 v cvbsc input capacitance 10 pf t sync delay from cvbs to tcs output from sttv pin 200 ns v clamp clamping level at synchro pulse 0 mv i clph high level clamp current (cvbs = v clamp + 1v) 5 m a i clpl low level clamp current (cvbs = v clamp - 0.3v) - 400 m a ma/sl, pol, lfb, ffb, vcr/tv v il input voltage low level - 0.3 + 0.8 v v ih input voltage high level 2 v dd v i il input leakage current (v i = 0 to v ddd ) - 10 + 10 m a c i input capacitance 10 pf scl, sda v il input voltage low level - 0.3 + 1.5 v v ih input voltage high level 3 v dd v i il input leakage current (v i = 0 to v dd ) - 10 + 10 m a f scl clock frequency (scl) 100 khz t r , t f input rise and fall time (10 to 90%) 2 m s c i input capacitance 10 pf rgb ref v i input voltage v dd - 0.5v v dd v dd + 0.3v v i i input current 50 ma 5348-03.tbl stv5348 - stv5348/h - stv5348/t 3/22
electrical characteristics - v dd = 5v, v ss = 0v, t a = 25 o c (continued) symbol parameter min. typ. max. unit outputs rgb v ol output low voltage (i ol = 2ma) 0.4 v v oh output high voltage (i oh = -2ma, rgb ref = v dd /2) rgb ref - 0.5 rgb ref v c l load capacitance 50 pf t r , t f rise and fall time (10 to 90%) 20 ns blan v ol output low voltage (i ol = 2ma) 0 0.4 v v oh output high voltage (i oh = -0.2ma) v dd - 0.5 v c l load capacitance 50 pf t r , t f rise and fall time (10 to 90%) 20 ns odd/even, sttv, l23, dv v ol output low voltage(i ol = 2ma) 0 0.5 v v oh output high voltage (i oh = -0.2ma) v dd - 0.8 v dd v c l load capacitance 50 pf t r , t f rise and fall time (10 to 90%) 20 ns cor and y (with pull up to v ddd ) v ol output low voltage (i ol = 2ma) 0 0.5 v c l load capacitance 25 pf t f fall time (r l = 1.2k w , v ddd - 0.5v to 1.5v) 50 ns i oll output leakage current -10 +10 m a sda v ol output low voltage (i ol = 3ma) 0 0.5 v t f fall time (3.0 to 1.0v) 200 ns c l load capacitance 400 pf crystal oscillator xti, xto f xtal crystal frequency 13.875 mhz r bias internal bias resistance 0.4 1 3 m w c i input capacitance 7pf timing serial bus (referred to v ih = 3v, v il = 1.5v) t low t high clock : l low period l high period 4 4 m s t su, dat data set-up time 250 ns t hd, dat data hold time 170 ns t su, sto stop set-up time from clock high 4 m s t buf start set-up time following a stop 4 m s t hd, sta start hold time 4 m s t su, sta start set-up time following clock low to high transition 4 m s 5348-04.tbl stv5348 - stv5348/h - stv5348/t 4/22
04.66 64 312 291 41 0 0 16.67 56.67 40 m s lines 42 to 291 inclusive (and 355 to 604 inclusive interlaced) (a) line rate (b) field rate all timings in m s line numbers lsp (tcs) r.g.b.y (1) r.g.b.y (1) 5348-03.eps figure 1 : display output timing t buf t hd,sta t low t high t su,sto t r t su,sta t hd,dat t f t su,dat sda scl sda 5348-04.eps v ih = 3v , v il = 1.5v figure 2 : serial bus timing output signal on sttv pin : vcs when r 1 d 2 = 0 tcs when r 1 d 2 = 1 2 4 pol ma/sl +5v vcs when r 1 d 2 = 0 tcs when r 1 d 2 = 1 pol grounded pol to v dd 1 synchro extractor line pll line pll vcs r 1 d 2 = "0" tcs r 1 d 2 = "1" bit r 1 d 2 i 2 c control sttv 5348-05.eps figure 3 : master synchronization mode - hardware configuration stv5348 - stv5348/h - stv5348/t 5/22
pol grounded, inputs signals : lfb line flyback synchro on pin 5 ffb field flyback synchro on pin 6 or scs synchro composite signal on pins 5 and 6 +5v scs lfb ffb 4 2 5 6 pol ma/sl pol to v dd , inputs signals : are lfb line flyback synchro on pin 5 ffb field flyback synchro on pin 6 or scs synchro composite signal on pins 5 and 6 +5v are note : r 1 d 0 and r 1 d 1 must be set to 1. 5348-07.eps figure 5 : slave synchronization mode vcs, tcs (interlaced) vcs, tcs (interlaced) tcs (non-interlaced) 621 (308) 622 (309) 623 (310) 624 (311) 625 (312) 12 3456 309 310 311 312 313 314 (1) 315 (2) 316 (3) 317 (4) 318 (5) 319 (6) 308 309 310 311 312 1 2 3 4 5 6 the number positions indicate the end of lines. internal signals : - vcs composite synchro from cvbs signal, - tcs teletext composite synchro. 5348-06.eps figure 4 : master synchronization mode - delivered composite synchronization signal line 16 field 0 dv for vps data field 1 field 0 5348-08.eps figure 6 : data valid timing ( dv) stv5348 - stv5348/h - stv5348/t 6/22
functional description i - displayable page memory map the organization of a page-memory is shown in figure 7. the display area consists of 25 rows of 40 charac- ters per row. the organization is as follows : - row zero contains the page header : the first seven characters (0 - 6) are used for messages regarding the operational status. the eighth character is an alphanumeric control character either "white" or "green" defining the "search" status of the page. when it is "white" the operational state is normal and the header appears white ; when it is "green" the opera- tional state corresponds to the "search mode" and the header appears green. the following twenty-four characters give the header of the requested page when the system is in search mode. the last eight characters display the time of day. - row number twenty-four is used by the micro- processor for the display of information, or used to display x/24 colored key data according to r0d7 bit. - row twenty-five comprises ten bytes of control data concerning the received page (see table 1) and fourteen free bytes which can be used by the microprocessor. 1 7248 10 14 row free for status (r0d7 = 0) or packet x/24 (r0d7 = 1) 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 row 8 scrolling time characters 24 characters from page header rolling on page search fixed characters alphanumerics white for normal, green on search 7 status characters main page display area 14 bytes free for use by m c 10 bytes for received page information 5348-09.eps figure 7 : page memory organization stv5348 - stv5348/h - stv5348/t 7/22
functional description (continued) ii - ghost row storage organization row address of stored data designation code row (packet) number function 0 0000 x / 26 enhanced display facilities page related data stored in chapter corresponding to level 1 data, i.e. for 0 goes in 4 " 1 " " 5 " 2 " " 6 " 3 " " 7 1 0001 2 0010 3 0011 4 0100 5 0101 6 0110 7 0111 8 1000 9 1001 10 1010 11 1011 12 1100 13 1101 14 1110 15 0 0 1 0 x / 28 conditional access 16 0000 x / 27 editorial linked pages 17 0001 18 0100 composition 19 0101 20 x / 24 page extension stored here if r0d7 = 0 21 x / 25 page extension 22 0 0 0 0 x / 28 color definition 23 x x x x 8 / 30 * * broadcasting service data packet 24 0 0 0 1 x/28 character set designation 25 ** not used * packet 8/30 storage : 8/30/0,1 : chapter 4, row23 8/30/2,3 : chapter 5, row23 8/30/4 to 15 : chapter 6, row23 ** see table 2 for vps data storage in chapter 5 5348-05.tbl d0 pu0 pt0 mu0 mt0 hu0 ht0 c7 c11 mag0 0 d1 pu1 pt1 mu1 mt1 hu1 ht1 c8 c12 mag1 0 d2 pu2 pt2 mu2 mt2 hu2 c5 c9 c13 mag2 0 d3 pu3 pt3 mu3 c4 hu3 c6 c10 c14 0 0 d4 ham ham ham ham ham ham ham ham found 0 d5 000000000pblf d6 0000000000 d7 0000000000 column0123456789 page number : - mag = magazine, pu = page units, pt = page tens. page sub-code : - mu = minutes units, mt = minutes tens, hu = hours units, ht = hours tens. pblf = page being looked for, found = low for page found, ham = hamming error in byte, c4-14 = control bits. 5348-06.tbl table 1 : row 25 received page control data format stv5348 - stv5348/h - stv5348/t 8/22
functional description (continued) iii - vps data (see table 2) vps data are stored in row 25 chapter 5 as shown in table 2 when vps enable bit (d4 of r8 register) is set. vps data bits are decoded and stored in a received area with biphase error bit. 8/30/2 data are stored as received (without ham- ming decoding) in row 23 chapter 5 according to table 2. . 8/30 packet and vps data decoding is the respon- sibility of the control software. the decoder simply stores transmitted data. iv - i 2 c bus register map (see table 3) registers r0 to r10 are write only whilst r11a is a read/write and r11b is read only. the automatic succession on a byte by byte basis is indicated by the arrows in table 3. in the normal operating mode tb should be set to logic level 0. after power-up the contents of the registers are as follows : all bits in registers r0 to r11a are cleared to zero with the exception of bits d0 and d1 in registers r5 and r6 which are set to logical one. after power-up all the memory bytes are preset to hexadecimal value 20h (space) with the exception of the byte corresponding to row 0 of column 7 of chapter 0 which is set to the value corresponding to "alpha white" hexadecimal value 07h. column 012345678910111213141516171819 8/30/2 (row 23) d initial page b13 b14 b15 b16 b17 b18 b19 b20 b21 b22 b23 b24 b25 vps (row 25) received page information b11 b12 b13 b14 b15 column 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 8/30/2 (row 23) status display vps (row 25) b4 b5 5348-11.tbl table 2 : pdc data storage in chapter 5 d7 d6 d5 d4 d3 d2 d1 d0 x24 position free running pll 0 disable rolling header (1) even off (1) sel 11b r0 mode 0 (1) 7 + p/ 8 bit acq. on/off ghost row enable dew/ full field tcs on t1 t0 r1 mode 1 (1) bank select a2 acq. cct a1 acq. cct a0 tb start column sc2 start column sc1 start column sc0 r2 page request address (1) (1) (1) prd4 prd3 prd2 prd1 prd0 r3 page request data (1) (1) (1) (1) (1) a2 a1 a0 r4 display chapter bkgnd out bkgnd in cor out cor in text out text in pon out pon in r5 display control (normal) bkgnd out bkgnd in cor out cor in text out text in pon out pon in r6 display control (newsflash / subtitle) status row btm/top cursor on/ off conceal/ reveal top/ bottom single/ double height box on 24 box on 1-23 box on 0 r7 display mode (1) (1) (1) vps enable clear mem. a2 a1 a0 r8 active chapter (1) (1) (1) r4 r3r2r1r0 r9 active row (1) (1) c5 c4 c3 c2 c1 c0 r10 active column d7 (r/w) d6 (r/w) d5 (r/w) d4 (r/w) d3 (r/w) d2 (r/w) d1 (r/w) d0 (r/w) r11a active data 60hz00 000data qual v cs qual r11b status ? ? ? ? ? 5348-07.tbl (1) reserved register bits : must be set to 0 ? ? ? ? table 3 : register specification stv5348 - stv5348/h - stv5348/t 9/22
functional description (continued) iv - i 2 c bus register map (continued) iv.1 - registers functions register function bit(s) description r0 address 00h r11 adressing and pin functions control sel 11b (d0) selection of register 11b (d0 = 1) or 11a (d0 = 0) even off (d2) control of odd/even pin : even signal output (d2 = 0) or grounded (d2 = 1) disable rolling header d4 = 1, disable rolling header d4 = 0, normal operation free running pll (d6) d6 = 0, pll locks on line frequency d6 = 1, to force free running mode x/24 position (d7) d7 = 0, packet x/24 stored to chapter 4 to 7/row 20 d7 = 1, packet x/24 stored to chapter 0 to 3/row 24 r1 address 01h operating mode controls t1 (d1) t0 (d0) 00 01 10 11 character display line control : 312.5/312.5 line mix - mode with interlace 312/313 line text - mode without interlace 312/312 line terminal mode without interlace external synchronization. scs mode (scan field synchro) tcs on (d2) master mode ( ma/sl pin 2 = 0) case pol pin 4 = 0 d2 = 0, pin 5 = vcs d2 = 1, pin 5 = tcs slave mode ( ma/sl pin 2 = v dd ) no effect dew / fullfield (d3) selection of field flyback mode or full channel mode (d3 = 1) for recovering of teletext data. ghost row enable (d4) selection of ghost row mode (d4 = 1) acquisition on / off (d5) control of acquisition operation (d5 = 0 enables acquisition) 7 bits + parity or 8 bits without parity (d6) selection of received data format either 7 bits with parity (d6 = 0) or 8 bits without parity (d6 = 1). r2 address 02h addressing information for a page request sc0, sc1, sc2 (d0, d1, d2) address the first column of the on chip page request ram to be written. tb (d3) test bit equal to "0" in the normal working mode. a0, a1 (d4, d5) address a group of four consecutive pages currently used for data acquisition. a2 (d6) address of one of the two groups of four pages for acquisition in normal mode. r3 address 03h data relative to the requested page (see table 3) prd0 - prd4 (d0 - d4) written data in the page request ram, starting with the columns addressed by sc0,sc1,sc2. r4 address 04h selection of one of eight pages to display a0, a1, a2 (d0, d1, d2) chapter selection. r5 address 05h display control for normal operation pon (d0, d1) picture on (in: d0, out: d1) text (d2, d3) text on (in: d2, out: d3) cor (d4, d5) contrast reduction on (in: d4, out: d5) bkgnd (d6, d7) background color on (in: d6, out: d7) in / out enable inside/outside the box r6 address 06h display control for news-flash subtitle generation see r5 see r5 5348-08.tbl stv5348 - stv5348/h - stv5348/t 10/22
functional description (continued) iv - i 2 c bus register map (continued) iv.1 - registers functions (continued) register function bit(s) description r7 address 07h display mode box on 0, 1-23,24 (d0, d1, d2) the "boxing" function is enabled on row 0,1-23 and 24 by d0, d1 and d2 set to one. top / bottom single / double height (d4/d3) x0 = normal 01 = double height rows 0 to 11 11 = double height rows 12 to 23 conceal / reveal (d5) conceal reveal function cursor on/ off (d6) cursor position given by row/column value of r9/r10 status row btm / top (d7) the row 24 is displayed before the "main text area" (lines 0-23) or after (d7 = 0). r8 memory access vps enable (d4) d4 = 1 enable vps acquisition and dv signal output. clear memory (d3) d4 = 1 clear memory. chapter selected with a2a1a0 (d2, d1, d0) r4. chapter address (d2, d1, d0) chapter selection r9 to r11a address 08h to 0bh* active row address (r9), active column address (r10). data contained in r11a read (written) from (to) memory by microprocessor via i 2 c. r11b address 0bh* status vcs qual (d0) good vcs quality signal detected (d0 = 1). bad vcs quality signal detected (d0 = 0). data qual (d1) good teletext signal (d1 = 1). bad teletext signal (d1 = 0). 50/60hz (d7) if d1 = 0 frame frequency is 50hz (only valid with good vcs) * reading of r11a or r11b is determined by register 0, bit d0. however, write operation is always performed on r11a register. 5348-09.tbl start column prd4 prd3 prd2 prd1 prd0 0 do care magazine hold mag2 mag1 mag0 1 do care page tens pt3 pt2 pt1 pt0 2 do care page units pu3 pu2 pu1 pu0 3 do care hours tens x x ht1 ht0 4 do care hours units hu3 hu2 hu1 hu0 5 do care minutes tens x mt2 mt1 mt0 6 do care minutes units mu3 mu2 mu1 mu0 the abbreviations have the same significance as in table 1 with the exception of the "do care" entries. it is only when this bi t is "1" that the corresponding digit is taken into consideration on page request. for example, a page defined as "normal" or one define d as "timed" may be selected. if " hold" is low the page is held. the addressing of successive bytes via the i 2 c is automatic. 5348-10.tbl table 4 : register r3 v - character sets the complete character set with 8-bit decoding is given in table 5. characters in columns 0 and 1 are normally dis- played as blanks. black dots represent the charac- ter shape whereas white dots represent the background. each character can be identified by a pair of corre- sponding row and column integers : for example the character "3" may be indicated by 3/3. a rectangle may be represented as follows : the characters 8/6, 8/7, 9/5, 9/7 are used as spe- cial characters, always in conjunction with 8/5. the 13 national characters are placed in columns with bit 8 = 0. stv5348 - stv5348/h - stv5348/t 11/22
functional description (continued) 2 2a 0 1 0 or 1 0 0 1 0 0 b 8 b 7 b 6 b 5 b i t s column r o w 3 3a 4 5 6 6a 7 7a 8 912 13 14 15 0 0 1 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 0 1 1 0 1 1 0 1 or 1 0 1 0 0 0 0 0 0 1 0 0 000 1 0 00 0 010 0 011 0 100 0 101 0 111 1 000 1 001 1 010 1 011 1 100 1 101 1 110 1 111 0 1 2 3 4 5 6 0 110 7 8 9 10 11 12 13 14 15 alphanumerics red alphanumerics green alphanumerics black alphanumerics yellow alphanumerics blue alphanumerics magenta alphanumerics cyan alphanumerics white ** flash ** ** steady end box ** start box normal height double height * * so si ** release graphics hold graphics new background ** * esc separated graphics ** continuous graphics conceal display black background ** graphics white graphics cyan graphics magenta graphics blue graphics yellow graphics green graphics re d graphics black b 4 b 3 b 2 b 1 1 1 case using c12 c13 c14 = 001 (german set) * these control characters are reserved for compatibility with other data codes. ** these control characters are presumed before each row begins 5348-10.eps table 5 : stv5348 complete character set (with 8 bit codes) - west european languages stv5348 - stv5348/h - stv5348/t 12/22
functional description (continued) 22a 0 1 0 or 1 0 0 1 0 0 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b i t s column r o w 33a4 5 66a 77a8 912131415 0 0 1 0 0 0 1 0 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 0 1 1 0 1 1 0 1 or 1 0 1 0 0 0 0 0 0 1 2 0000 1 000 0010 0011 0100 0101 0111 1000 1001 1010 1011 1100 1101 1110 1111 0 1 2 3 4 5 6 0110 7 8 9 10 11 12 13 14 15 alphanumerics red alphanumerics green alphanumerics black alphanumerics yellow alphanumerics blue alphanumerics magenta alphanumerics cyan alphanumerics white ** fl ash ** ** steady end box ** start box normal height double height * * so si ** release graphics hold graphics new background ** * esc separated graphics ** continuous graphics conceal display black background ** graphics white graphics cyan graphics magenta graphics blue graphics yellow graphics green graphics red graphics black case using c12 c13 c14 = 001 (rumanian set) * these control characters are reserved for compatibility with other data codes. ** these control characters are presumed before each row begins 5348-??.eps table 6 : stv5348/h complete character set (with 8 bit codes) - east european languages stv5348 - stv5348/h - stv5348/t 13/22
functional description (continued) 22a 0 1 0 or 1 0 0 1 0 0 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b i t s column r o w 33a4 5 66a 77a8 912131415 0 0 1 0 0 0 1 0 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 0 1 1 0 1 1 0 1 or 1 0 1 0 0 0 0 0 0 1 2 0000 1 000 0010 0011 0100 0101 0111 1000 1001 1010 1011 1100 1101 1110 1111 0 1 2 3 4 5 6 0110 7 8 9 10 11 12 13 14 15 alphanumerics red alphanumerics green alphanumerics black alphanumerics yellow alphanumerics blue alphanumerics magenta alphanumerics cyan alphanumerics white ** fl ash ** ** steady end box ** start box normal height double height * * so si ** release graphics hold graphics new background ** * esc separated graphics ** continuous graphics conceal display black background ** graphics white graphics cyan graphics magenta graphics blue graphics yellow graphics green graphics red graphics black case using c12 c13 c14 = 001 (german set) * these control characters are reserved for compatibility with other data codes. ** these control characters are presumed before each row begins 5348-??.eps table 7 : stv5348/t complete character set (with 8 bit codes) - turkish european languages stv5348 - stv5348/h - stv5348/t 14/22
functional description (continued) the basic set of the 96 characters is shown in table 8.the location of the 13 national characters are shown in table 8 whilst full national character sets are depicted in tables 9, 10 and 11. 2/0 2/1 2/2 2/3 2/4 2/5 2/6 2/7 2/8 2/9 2/10 2/11 2/12 2/13 2/14 2/15 3/0 3/1 3/2 3/3 3/4 3/5 3/6 3/7 3/8 3/9 3/10 3/11 3/12 3/13 3/14 3/15 4/0 4/1 4/2 4/3 4/4 4/5 4/6 4/7 4/9 4/8 4/10 4/11 4/12 4/13 4/14 4/15 5/0 5/1 5/2 5/3 5/4 5/5 5/6 5/7 5/8 5/9 5/10 5/11 5/12 5/13 5/14 5/15 6/0 6/1 6/2 6/3 6/4 6/5 6/6 6/7 6/8 6/9 6/10 6/11 6/12 6/13 6/14 6/15 7/0 7/1 7/2 7/3 7/4 7/5 7/6 7/7 7/8 7/9 7/10 7/11 7/12 7/13 7/14 7/15 national character national character national character national character national character national character national character national character national character national character national character national character national character 5348-11.eps table 8 : basic character set. stv5348 - stv5348/h - stv5348/t 15/22
language english german swedish italian french spanish c12 c13 c14 phcb (1) 000 001 00 1 011 100 101 2/3 2/4 4/0 5/11 5/12 5/13 5/14 5/15 6/0 7/11 7/12 7/13 7/14 character position (column/row) 5348-12.eps table 9 : stv5348 character set - west european languages note 1 : where phcb are the page header control bits. other combinations default to english. only the above characters change with the p hcb. all others characters in the basic set are shown in table 5. functional description (continued) stv5348 - stv5348/h - stv5348/t 16/22
functional description (continued) note 1 : where phcb are the page header control bits. other combinations default to german. only the above characters change with the phcb. all others characters in the basic set are shown in table 7. note 1 : where phcb are the page header control bits. other combinations default to turkish. only the above characters change with the phcb. all others characters in the basic set are shown in table 7. language german swedish c12 c13 c14 phcb (1) 000 001 00 1 0 11 10 11 2/3 2/4 4/0 5/11 5/12 5/13 5/14 5/15 6/0 7/11 7/12 7/13 7/14 character position (column/row) polish serbo-croat czechoslovak rumaniam 1 1 5348-??.eps table 10 : stv5348/h character set - east european languages language english german turkish italian french spanish c12 c13 c14 phcb (1) 000 001 0 1 011 100 101 2/3 2/4 4/0 5/11 5/12 5/13 5/14 5/15 6/0 7/11 7/12 7/13 7/14 character position (column/row) 1 5348-??.eps table 11 : stv5348/t character set - turkish european languages stv5348 - stv5348/h - stv5348/t 17/22
alphanumerics and graphics 'space' character 2/0 alphanumerics character 2/13 alphanumerics or blast-through alphanumerics character 4/8 alphanumerics character 7/15 contiguous graphics character 7/15 separated graphics character 7/15 separated graphics character 7/6 contiguous graphics character 7/6 background color display color = = 5348-17.eps figure 8 : character format functional description (continued) stv5348 - stv5348/h - stv5348/t 18/22
i/o pin electrical schematics 1 cvbs 250 w v dda v ssa 5348-18.eps figure 9 : analog 1 (cvbs) 28 cblk 250 w v dda v ssa 5348-19.eps figure 10 : analog 2 (cblk) 450 w v dda v ssa pins 2, 27 ma/sl, test 5348-20.eps figure 11 : input a 450 w v ddd v ssd pins 4, 6 pol, ffb 5348-21.eps figure 12 : input d 11 v ddd v ssd rgb ref 450 w pins 8, 9, 10 r, g, b 5348-22.eps figure 13 : prgb 23 24 xto 450 w 750k w 450 w v ddd v ssd xti 5348-23.eps figure 14 : p??? 450 w v ddd v ssd pins 5, 12, 13, 14, 15, 18, 19, 20, 21 sttv/lfb, blan, cor, odd/even, y, l23, dv, reserved, vcr/tv 5348-24.eps figure 15 : inout stv5348 - stv5348/h - stv5348/t 19/22
s t v 5 3 4 8 +5v 25 2 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 26 27 28 sl ma +5v 3 0.1 m f 0.1 m f c1* c2* tv vcr cvbs ma/sl v dda pol sttv/lfb ffb v ssd r g b rgb ref blan cor odd/even y scl sda vcr/tv xto xti test cblk v v ssa sso v ddd +5v 10nf +5v 1 1 m f 13.875mhz 47k w ** +5v 0.1 m f +5v 1 m f 5348-27.eps * value according to used crystal, c1 = c2 = 2 * c load example : c1 = c2 = 56pf, c load = 30pf. ** depending on application. please refer to our video application lab. remark : all the power supply inputs must be switched on at the same time (connected to the same source). application diagram i/o pin electrical schematics (continued) 16 450 w v ddd v ssd scl 5348-25.eps figure 16 : pscl 17 450 w v ddd v ssd sda 5348-26.eps figure 17 : psda stv5348 - stv5348/h - stv5348/t 20/22
pm-dip28.eps package mechanical data 28 pins - plastic dip dimensions millimeters inches min. typ. max. min. typ. max. a1 0.63 0.025 b 0.45 0.018 b1 0.23 0.31 0.009 0.012 b2 1.27 0.050 d 37.4 1.470 e 15.2 16.68 0.598 0.657 e 2.54 0.100 e3 33.02 1.300 f 14.1 0.555 i 4.445 0.175 l 3.3 0.130 dip28.tbl stv5348 - stv5348/h - stv5348/t 21/22
pm-so28.eps package mechanical data 28 pins - plastic micropackage (so) dimensions millimeters inches min. typ. max. min. typ. max. a 2.65 0.104 a1 0.1 0.3 0.004 0.012 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.013 c 0.5 0.020 c1 45 o (typ.) d 17.7 18.1 0.697 0.713 e 10 10.65 0.394 0.419 e 1.27 0.050 e3 16.51 0.65 f 7.4 7.6 0.291 0.299 l 0.4 1.27 0.016 0.050 s8 o (max.) so28.tbl information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no licence is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or s ystems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics ? 1998 stmicroelectronics - all rights reserved purchase of i 2 c components of stmicroelectronics, conveys a license under the philips i 2 c patent. rights to use these components in a i 2 c system, is granted provided that the system conforms to the i 2 c standard specifications as defined by philips. stmicroelectronics group of companies australia - brazil - canada - china - france - germany - italy - japan - korea - malaysia - malta - mexico - morocco - the neth erlands singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. stv5348 - stv5348/h - stv5348/t 22/22

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